Rambus today (14th) announced the launch of the complete next-generation AI PC memory module, designed for user-side chipsets, including two new power management chips (PMICs) designed for user-side computing, including the PMIC5200 for LPDDR5 CAMM2...
Rambus today (14th) announced the launch of the complete next-generation AI PC memory module, designed for user-side chipsets, including two new power management chips (PMICs) designed for user-side computing, including the PMIC5200 for LPDDR5 CAMM2 (LPCAMM2) memory module and the PMIC5120 supporting DDR5 CSODIMM and CUDIMM memory modules.
Among them, the PMIC5200 is specially designed for LPDDR voltage optimization, with excellent power conversion accuracy and efficiency; the PMIC5120 currently supports data transfer rates up to 7,200 MT/s, and will be able to support higher rates by expanding its existing capabilities in the future.
These PMICs are combined with client time drivers (CKDs) and tandem existence detectors (SPD Hubs) to form a complete memory chip set, which can be used in AI PC computers, desktops and workstations. Additionally, Rambus said it is now available to provide an interface chip set that fully supports all JEDEC standard DDR5 and LPDDR5 servers and client memory modules.
Rambus Memory Interface Chip Senior Vice President and General Manager Rami Sethi pointed out that AI models are growing continuously, with growth rates exceeding 10 times per year, and the parameters have exceeded one trillion. The market has higher demand for memory bandwidth and capacity, such as reducing delays, so that the processor maintains higher efficiency operation.
Rami Sethi pointed out that Rambus has established a market leader through the DDR5 server PMIC series. This time, it has further launched two user PMICs, and jointly formed a complete DDR5 and LPDDR5 memory chip set with CKD and SPD Hub. Memory interface chipsets for LPCAMM2, DDR5 CUDIMMs and CSODIMMs can help users challenge the multi-module format, capacity and frequency range required for the expected new wave of AI PC platforms.
As data transfer rates continue to rise to support AI and other advanced workloads, the importance of signal integrity (SI) and power integrity (PI) management is increasing day by day. Rambus pointed out that the company has 35 years of experience in high-performance memory technology and has a deep professional career in the SI/PI field. This expert allows Rambus' DDR5 and LPDDR5 memory interface chips to maintain excellent signal and power stability even in high-performance environments, supporting servers and client DIMM modules.
